1. Field of the Invention
The present invention relates to a semiconductor memory, and more particularly, to a memory of a multilevel quantum dot structure and a method for fabricating the same.
2. Background of the Related Art
It can be foreseen that the use of a MOS structure as a basic switching device will reach its limit as device packing density increases. In a case of the MOS structure with a device packing density in a range of 4 giga DRAM, a switching operation using a gate voltage in accordance with the principles of a MOS device operation will be impossible, because the distance between a source and a drain is reduced to approx. 0.13 .mu.m (S. Wolf. "Silicon Processing; for the VLSI Era`, V2, chap.8). Due to device malfunctions caused by tunnelling between the source and drain and tunnelling through a gate oxide film when no gate voltage is applied, the limit of an integration using the MOS structure will be approx. 4 giga DRAM. Therefore, in order to fabricate a device having a large density such as giga class, or the like a device other than the current MOS structure should be employed. The form of device suggested by many research groups is the SET (Single Electron Transistor) (see, K. K. Likharev, IBM J. Res. Develop. 32(1) p144(1988)). The SET is a device employing the so called Coulomb blockade effect pertaining to quantum effects exhibited by the interaction between electrons having a nano-scale dimension, whereby any further tunnelling of charges is suppressed during the process of tunnelling charge carriers such as (electrons or holes) through an insulating film, such that the individual flow of discrete electrons, can be controlled.
The principle of the Coulomb blockade effect caused by an SET tunnelling is as follows. (M. H. Devoret and H. Grabert, in "Single Charging Tunnelling", edited by H. Grabert and M. H. Devoret (Plenum N.Y., 1992) p1).
If the total capacitance caused by a region into which electrons enter through tunnelling is very small, a charge effect of the discrete electrons can be observed. If a charge energy e.sup.2 /2C of the discrete electron charge is greater than an energy k.sub.B T of a thermal vibration (M. H. Devoret and H. Grabert, in "Single Charging Tunnelling", edited by H. Grabert and M. H. Devoret Plenum N.Y., 1992) p1), and there is no voltage increase applied externally when the temperature remains constant, an electron can not have the energy required for charging a capacitor by tunnelling. Accordingly, there is no further tunnelling occurred once one electron is charged. That is, since an electron previously tunnelled, and charged in a capacitor causes a low voltage having a level of at least a voltage drop at the capacitor, is applied to the next electron, the next electron does not achieve the level of energy required for charging by tunnelling, and thus no further tunnelling occurs. This effect of suppression of further tunnelling due to electrons that are already tunnelled called a Coulomb blockade effect. When an effective voltage applied to an electron in a double junction structure receiving an external voltage is V, the electron will have an energy of eV, and when the electron is charged in a capacitor by tunnelling, an energy loss amounting to the charged energy occurs. The effective voltage that this charge applies to the next charge is ##EQU1##
such that the electron is to have an energy of ##EQU2##
Because a subsequent electron to tunnel at a later time can not have the energy required for charging due to this energy difference occurs (even if an identical voltage is applied), further tunnelling occurs.
It is a basic concept of the SET that individual electrons are controlled to make a discrete movement using this Coulomb blockade effect. If thermal energy can complement the energy difference, the tunnelling of electrons can also occur without any increase in the applied external voltage. In order to suppress this undesirable tunnelling caused by thermal vibrations, an energy loss of ##EQU3##
caused by the charging should be greater than the thermal energy k.sub.B T. Therefore, in order to satisfy this condition, an overall capacitance of the system should be, for example, as small as 3 aF. Most of the SET devices reported currently have a large quantum dot formed such that a capacitance of greater than 3 aF is achieved, resulting in an operation temperature being maintained very low due to a thermal smearing effect. In order to cause the Coulomb blockade effect, in addition to the suppression of the thermal smearing by having the charge energy greater than the thermal energy, the following condition should also be satisfied (M. H. Devoret and H. Grabert, in "Single Charging Tunnelling", edited by H. Grabert and M. H. Devoret (Plenum N.Y., 1992) p1). EQU Rt&gt;&gt;Rk,
where Rt is a tunnelling resistance, and Rk is a resistance quantum (=25.8 k.OMEGA.). The above condition, coming from the theory of uncertainty, implies that the above condition should be satisfied for preventing an occurrence of tunnelling, because tunnelling can occur without any increase of external voltage if the range of energy variation of an electron is greater than the charged energy. ##EQU4## PA1 where, V'g and V'c denote voltages after charging.
Two types of the SET structures using the Coulomb blockade effect have been known. One type, like a MOS structure, has a source, a drain, and a gate, with a channel having conductive quantum dots for facilitating a discrete electron flow. Therefore, the channel consists of an insulating material and the conductive quantum dots, facilitating an electron flow by using discrete tunnelling. That is, the channel has quantum dots contained in the insulating material. (K. Nakazato, T. J. Thornton, J. White, and H. Ahmed, Appl. Phys. Lett. 61(26), 3145(1992); D. J. Paul, J. R. A. Cleaver, H. Ahmed, and T. E. Whall, Appl. Phys. Lett. 63(5), 631(1993); D. Ali and H. Ahmed, Appl. Phys. Lett. 64(16), 2119(1994); E. Leobandung, L. Guo, Y. Wang, and S. Y. Chou, Appl. Phys. Lett. 67(7), 938(1995); K. Nakazato, R. J. Blankie, and H. Ahmed, J. Appl. Phys. 75(10), 5123(1992); Y. Takahashi, M. Nagase, H. Namatsu, K. Kurihara, K. Iwdate, Y. Iwadate, Y. Nakajima, S. Horiguchi, K. Murase, and M. Tabe, IEDM 1994, p938; E. Leobandung, L. Guo, and S. Y. Chou, IEDM 1995, p367; O. I. Micic, J. Sprague, Z. Lu, and A. J. Nozik, Appl. Phys. Lett. 68(22), 3150(1996)). In the formation of the quantum dots, a variety of methods can be employed. The quantum dots may be formed in an insulating material by EBL(Electron Beam Lithography) and RIE(Reactive Ion Etching)(Nakazato, T. J. Thornton, J. White, and H. Ahmed, Appl. Phys. Lett. 61(26), 3145(1992); D. J. Paul, J. R. A. Cleaver, H. Almed, and T. E. Whall, Appl. Phys. Lett. 63(5), 631(1993); D. Ali and H. Ahmed, Appl. Phys. Lett. 64(16), 2119(1994); E. Leobandung, L. Guo, Y. Wang, and S. Y. Chou, Appl. Phys. Lett. 67(7), 938(1995); K Nakazato, R. J. Blankie, and H. Ahmed, J. Appl. Phys. 75(10), 5123(1992); Y. Takahashi, M. Nagase, H. Namatsu, K. Kurihara, K. Iwadate, Y. Takahashi, M. Nagase, H. Murase, and M. Tabe, IEDM 1994, p938; E. Leobandung, L. Guo, and S. Y. Chou, IEDM 1995, p367), or by applying an electric field to a doped substrate to form local conductive regions (H. Matsuoka and S. Kimura, Appl. Phys. Lett 66(5), 613(1995)). Nano scale quantum dots may be formed by chemical synthesis (N. Uyeda, J. Colloidal Interface Science 43, 264(1973); A. A. Guzelian, U. Banin, A. V. Kadavanich, X. Peng, and A. P. Alivisatos, Appl. Phys. Lett 69(10), 1432(1996)), or by cluster beam deposition (W. Chen, H. Ahmed, and K. Nakazato, Appl. Phys. Lett 66(24), 83(1995)).
In the aforementioned form of devices, a current-to-voltage curve has an ideal stepped form due to electrons passed through the channel by tunnelling and blocking the next incoming electrons. These different currents are used to provide memory capabilities. Although the Coulomb blockade effect required for an SET device is sometimes exhibited even though the channel through which electrons move is formed by a two dimensional conductive line (M. A. Kastner, Rev. Mod. Phys. 64(3), 849(1992); R. A. Smith and H. Ahmed, J. Appl. Phys. 81(6), 2699(1997)), the quantum dots should be contained in an insulating material for the most stable induction of discrete electron tunnelling. Accordingly, this type of device uses a quantized change of a current exhibited through a Coulomb blockage effect between tunnelling electrons.
Another form of the SET device is a device in which, while having a structure similar to the MOS structure like the aforementioned devices, floating dots are formed in a gate oxide film for charging electrons in a channel in the floating dots to reduce a current flowing through the channel (S. Tiwari, F. Rana, H. Hanafi, A. Hartstein E. F. Crabbe, and K. Chan, Appl. Phys. Lett. 68(10), 1377(1994); K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, IEEE Trans. Electron Devices 41(9), 1628(1994); A. Nakajima, T. Futatsufgi, K. Kosemura, T. Fukano, and N. Yokoyama, Appl. Phys. Lett. 70(13), 142(1997)). This form of device is similar to an EPROM(Electrically Programmable Read Only Memory) using the hot carrier effect in a reverse manner, in which electrons charged in the floating dots reduce a voltage applied to an underlying channel, thereby current flowing through the channel is reduced. In order for the current to exhibit a quantized change in the charge of electrons, the Coulomb blockade effect should appear, in which any further continuous charging of electrons is prevented by electrons already charged in the floating quantum dots. Due to the Coulomb blockade effect, electrons present in the channel are charged in the floating quantum dots only at a particular voltage exceeding the Coulomb blockade effect, resulting in the current flowing through the channel to exhibit a quantized reduction. By sensing the quantized reduction of the current, a memory function can be provided.
A conventional SET memory using a single layered floating quantum dot will be explained with reference to the attached drawings. FIG. 1 illustrates a section of a general E.sup.2 PROM memory cell, and FIG. 2 schematically illustrates a double junction structure using single layered floating quantum dots.
A result of calculation of an SET device using the single layered floating dots
The general E.sup.2 PROM memory cell is provided with a tunnelling insulating film 2 formed on a semiconductor substrate 1, a floating gate 3 formed on the tunnelling insulating film 2, an insulating film 4 on the floating gate 3, a control gate 5 on the insulating film 4, and source/drain impurity regions 6 and 7 formed in the semiconductor substrate 1 on both sides of the floating gate 3.
The operation of the aforementioned general E.sup.2 PROM memory cell will be explained. First, the operation for writing "1" on the E.sup.2 PROM memory cell will be explained.
When the semiconductor substrate 1 and the source impurity region 6 are grounded, the drain impurity region 7 receives a voltage of approx. 7.about.8V, and the control gate 5 receives a voltage of 12.about.13V, an avalanche breakdown occurs at a pn junction between the drain impurity region 7 and the substrate 1, causing the generation of hot electrons. Of the hot electrons generated, a portion thereof obtains an energy greater than an energy barrier height (approx. 3.2 eV) between the substrate 1 and the tunnelling insulating film 2. Those electrons go over the tunnelling insulating film 2 from the substrate 1, and enters into the floating gate 3. In this instance, as the number of electrons stored in the floating gate 3 gradually increases, a cell threshold voltage is increased. In general, "writing" into the memory cell is performed until the cell threshold voltage becomes higher than 7V. Once the electrons are stored in the floating gate 3, the stored electrons can be kept therein for a few years with almost no change because of the negligible natural electron discharge over the height of the energy barrier between the floating gate 3 and the insulating films 2 and 4 above and below the floating gate (which is high greater than 3 eV).
The operation of erasing the data "1" written in the E.sup.2 PROM memory cell will be explained.
When 12.about.13V is applied to the source impurity region 6 while the substrate 1 and the control gate 5 are grounded and the drain impurity region 7 is floated, the electrons stored in the floating gate 3 are discharged therefrom to the source impurity region 6 through the tunnelling insulating film 2 according to the Fowler-Nordheim tunneling effect. In this instance, as the number of electrons discharged from the floating gate 3 is increased, the cell threshold voltage drops. In general, an "erasure" is made until the cell threshold voltage drops below 3V. A tunneling voltage of an electron from a channel to a floating dot (floating gate) and a consequential current change in a device having the aforementioned single layered floating dots can be calculated as follows.
Referring to FIG. 1, when it is assumed that respective junction capacitances and voltages are denoted as Cg, Cc, Vg, and Vc in a double junction (J. R/ Tucker, J. Appl. Phys. 72(9), 4399(1992)) of the single layered floating quantum dots, a voltage drop and a V.sub.G required for charging can be calculated according to the following equations for both cases when an extra electron is charged and not charged.
1) When no extra electron is charged
According to Vg+Vc=V.sub.G and a charge neutrality, the relationship of CgVg=CcVc, i.e., ##EQU5##
exists. According to the above two equations, Vc can be expressed by equation (1), below. ##EQU6##
The device activation uses a difference of currents flowing through a channel, which difference is fixed according to a difference of voltages required for forming an inversion layer in the channel. Therefore, different currents flow through the channel due to from a difference of Vc.
2) When one extra electron is charged in the floating quantum dot EQU Vg+Vc=V.sub.G
As the extra electron is charged in the floating quantum dot by a gate voltage applied from outside of the device, a charge neutrality of the system is changed. Polarization charges formed from voltages applied to respective junctions can not make the neutrality matched, exhibiting an overall charge state of the floating quantum dots to be -e. This charge neutrality can be expressed by equation (2) shown below. EQU CgVg-CcVc=e, e=1.6.times.10.sup.-19 C (2)
Therefore, the voltage Vc charged to the channel can be expressed by equation (3) shown below. ##EQU7##
Therefore, a change of voltage applied to the channel caused by charging of the extra electron in the floating dot can be expressed by equation (4) shown below. ##EQU8##
The voltage applied on the channel is reduced by .DELTA.Vc, and the voltage drop reduces the current flowing through the channel. The voltage drop caused by the electron charge is occurred at a particular gate voltage, and a quantized change is exhibited in a current-to-voltage. A voltage which should be applied to the device for causing a charge of an extra electron into the floating quantum dots which causes the voltage drop can be expressed as shown below. Because a difference of energies between an electron charged state and no electron charged state should be supplied, this charge energy difference can be calculated by equation (5) as follows. ##EQU9##
Therefore, charging of an extra electron is possible only when the V.sub.G, an external voltage applied to the device, can make up the energy difference, which is called a Coulomb gap. That is, an electron tunneling is possible to the floating quantum dot at ##EQU10##
When capacitances of respective junctions are 1.6 aF respectively, the voltage at which the voltage drop and the tunneling are occurred can be expressed as follows. ##EQU11##
If the gate oxide film is formed thicker in order to lower Cg down to 1 aF for prevention of a malfunction of the device due to re-tunneling of the electrons charged in the floating quantum dots to the gate, .DELTA.Vc=0.615V and V.sub.G =0.307V, at which a tunneling occurs. As seen from the aforementioned equations, a gate voltage at which one extra electron can be charged is ##EQU12##
and a channel voltage Vc at this time is ##EQU13##
And, a channel voltage shift .DELTA.Vc from this charging of the extra electron is ##EQU14##
As the charging is performed, the Vc after the charging has a negative (-) value because .DELTA.Vc is greater than the Vc before charging, and no further tunnel occurs.
A gate voltage which should be applied from outside of the device for charging one more extra electron in the floating quantum dot is ##EQU15##
and the Vc is ##EQU16##
That is, in order to charge a second electron when a first electron charged in the floating quantum dot is not discharged to the gate electrode, the Vc should have a positive value. That is, 2Cg&gt;Cg+Cc, i.e., Cg&gt;Cc. That is, even if an energy required for charging an electron is applied to the device from outside of the device, an electron movement occurs at another junction if a voltage applied to the channel is negative. The movement of electrons between the channel and the floating quantum dots may cause malfunction of the device. Also, the deposition of the gate oxide film to be thicker than the tunnel oxide film required for preventing escape of the electrons charged in the floating quantum dots into the gate is not easily achieved. And, it is presumed the problem of co-tunneling (D. V. Averin and Y. V. Nazarov, in "Single Charging Tunneling", edited by H. Grabert and M. H. Devoret (Plenum, N.Y., 1992) p217; L. J. Geerlings, in "Physics of Nanostructures", edited by J. H. Davies and A. R. Long (The Scottish Universities Summer School in Physics, 1992) which arises as a problem in the SET is more sensitive in the case of the single layered floating quantum dot and co-tunneling will cause a problem in a reliability of the device. These are the reasons why the single layered floating quantum dots are not used in the fabrication of multiple digit devices.
As explained, the voltage applied to the channel drops whenever an electron tunnels from the channel to the floating quantum dot. If this voltage drop occurs at various levels of gate voltages periodically, this voltage drop facilitates, other than the on/off switching used in an MOS up to now, a multi-digit storage function in which different information can be made distinctive even in one device. However, the single layered floating quantum dots have a problem in that charging of an extra electron in addition to a previously charged extra electron is not easily achieved.